Research

Our work examines heat transfer in advanced packages, designs cooling paths for chiplets, and improves printing processes for large-area packaging.

As devices become smaller and more powerful, increasing power density produces high heat flux and makes thermal management more difficult.

We investigate heat transfer from the standard-cell level to the architecture level and develop guidelines for thermal-aware package design.

The aim is to understand the mechanisms that affect performance and reliability in future semiconductor systems.

Chiplets in a heterogeneous system can generate different amounts of heat. Uneven temperatures can cause thermomechanical stress and reduce reliability.

We use AI to explore microchannel shapes for liquid cooling, a design space too large and nonlinear for simple trial and error.

Our goal is to improve cooling efficiency and make temperatures more uniform across the package.

Large advanced systems can exceed the wafer reticle limit. Panel-level packaging offers room for larger-scale integration but demands uniform fabrication over a wider area.

We investigate large-area printing of redistribution layers (RDL) and polymer insulating dielectrics (PID), and use AI to optimize printing parameters and process conditions.

The work focuses on uniformity, throughput, cost and reliability rather than claiming a finished manufacturing process.